Analog test design for battery charger's ammeter

Most Promising direction so far
tested for non rectified DC offset sine + this↓↓ DC cut off sine

 the error is yet undefined

note: haven't spotted any Op Amp integrator schematics in web = likely more doable by ADC µC -ing the shunt drop off -- for more realistic amps display . . .

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update 2017.07.25

no big difference but the average error is actually greater than previously !!! only it distributes over "parabola" while in previous it's one polar half of that !!! so here the !!! seeming error is lesser -- all because of this bullsh¡t integrator that is actually not that but a sort of a low pass filter . . .

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update 2017.07.26

!!! it seems we have a signal ~~ PS! PS! PS! ~~ it's yet tested for shown cut Sine only !!!

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[Eop]

trivia CD4060BC

• (Simulation speed) Fast model
• !!! Fixed to Spice Global GND
• integral for external Clk only !!!
• using Ti-s Data sheet acquired from Harris Semiconductor SCHS049C − Revised October 2003 v.

Test/Result uses 2x(CD4003/4013 to pad for missing outputs - inverting outputs not implemented but for φ̅₀̅)

Internals (barely noticeable on schematic -- the p9 & p10 use noninverting output buffers CD4060jf4V.asc -- not shown below)

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[Eop]