DC-DC LED-s Spice Experiment

No over-voltage protection ... no under-voltage lock-down ... no reverse polarity protection ... not built/tested in real life ... ::

555´s alternate ...

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regulated switched LED regulator designs (experimental)

the thing ::

how to set it up in practice . . . involves a number of tests ::

1. Detach the mosfet and the feedback Mod line -- from simulation and from build
   Regulate the frequency and duty to match those of the simulation
2. Re-attach the mosfet , ( /!\ /!\ /!\ ) set some 20Ω or greater in series with the 6LF22 to limit the current through LED-s --and-- set electrical fuse or limitting resistor in series with the LED-s --or-- double the number of LED-s ( /!\ /!\ /!\ ) - - - - - - - - - we are going to verify the transformer ::
   do the same mods on the simulation and test for the differences . . .
   -- if the real build performs worse you need to recalculate and rebuild the transformer accounting for resistance not present in ↑this↑ circuit
   -- if the build performs better then the primary side is "over-driven" the timing of the switching wave-forms has to be re-evaluated and adjusted
3. Attach the Mod line --and-- ( /!\ /!\ /!\ ) set the regulation to be greater than in simulation (!! dont remove electrical fuse or extra LED-s !!) ( /!\ /!\ /!\ ) ,
   -- regulate it bit below the desired LED current (in case the regulation failure -- the regulator has to be re-designed --or-- replaced with better known one)
4. if everything worked out so far the additional tests are required such as ::
• test for bit higher than simulated input voltage (the Cl batteries may have up to 1.8V per cell e.g. 10.8V for fresh 6LF22)
• test for battery contact strobe !!!
  -- here everything can fail -- use fuses and perhaps build a protective controller that can fast switch off the circuit under test
• test for the lower than in simulation input voltage !!!
  -- may result in oscillations failure and the MOS-FET being "constantly ON" (attempting to remain in conduction mode) . . .
• etc. ...

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Basic simple ::

add VCO , Mod2 divider , the 2 to 4 decoder and a current sense / +integrator -- and it's basically done . ..

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some 555 spice models' tests

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inter-model timing differences

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input sink/source currents

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555-s based SMPS test

as is ...

... in practice it requires a sharper or more discrete response for larger errors -- this one could do for relatively steady load -- a bad point here is that increasing the controls' sophistication impacts either on efficiency at light loads - - - or retail tech. such as in SMPS controllers where the dev. of such is expensive and won't pay off for prototype solutions . . .

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+ an update to the schematic in the prev. post

no pwm just switching test
*

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theoretical experiment of 3 to 12 V boost converter

Simple , minimal ::

. . . with error as switch gets near constant 18mA to it's base due xa should be xi

however using cascade drive for switch poses problems -- also a good definition method for vc2 (LMx39/x93 OUTP)

some fixes -- no change . . . need to opt. the drive power usage


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www voltage multiplier test

src :: http://electricalnote.com/symmetrical-dc-to-dc-converter-with-ic555/
(i donno why they have to post circuits in the web that add up to the climate warming ...)

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mod/fix ::
(the circuit'd do better with true complement wave drive -- e.g. -- a RS digital flop driving two powerful buffers -- in our case -- 555-s)

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A Shifted Clock PWM test on 555 timers

the circuit ::

basically we have something here that resembles to a PWM but the circuit has several shortcomings

1. a bad selection of control voltage ranges that won't allow us to get intended PWM/delay control
2. while the clock generator is about independent of the supply voltage then other timers are not
3. the operation relies on successful fast cascaded triggering of the timers -- this might set a speed limits or other wise complicate the circuit

otherwise this DEMO is likely sufficient to give the reader a clue about what was intended -- AND-ing the shifted clocks at low duty versus OR-ing the clocks at high duty ---

--- the 0 to 100 % PWM is achievable either by designing the delay-/shift- timer to enable very narrow delays or pre-scaling it's start by it's time minimum constant -- adds complexity and degrades the accuracy and/or reliability

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A different approach -- using a simplified setup -- and more complex special situation handling ::

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automatic duty ratio control experiment

a definition correction :: the 555 acts as the 555 e.g. an inverting comparator with the high accuracy hysteresis relative to supply rails (however it's internal hw setup is similar to a window comparator namely an "outside the window comparator" - only it's comparators´outputs are not bound together by simple combinatorical (read: boolean algebraic) operation - which for outside the window comparator would be logical sum) - but instead they drive an RS-trigger which inverts the upper comparator output and remembers that output until the lower comparator triggers - then remembers it's output until the upper triggers - which in a sense of a window comparator would be - depending on input slope - an unidirectionally active operation of the pair of inverting and non-inverting comparators . . . the least however reduces to the case of a single comparator with relatively large hysteresis and inverting output

some xx555 timer tests

crystalless oscillator / attempt to discriminate the intervals (initialized by pin-4 , R2 , C4)
-- the messy circuit is remnant for testing out several pulsed feed options -- this one seems to produce equal (14-tick) on cycles ???

"inversed rails" variant (an attempt to avoid initialization of the retriggerable monostable -- it still requires initialization -- by pin-2 , R11 , C3 -- this time)

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Misc.

Rewired the old 3V Li-Cell-Button battery fed X-mas decorations -- those batteries are not cheap and have a too low capacity for LED-s . . . also i just got an unused Nokia AC-3E charger !
Theres 2 figures in series connection (2x  LED-s -- 1 per figure) -- since the least energy gets lost that way -- here what got implemented :

the next i found too complex to build for this simple task (where actually a properly chosen resistor would do fine . . .) -- but i wanted to check the circuit in action (which i rarely do) -- so the above v.1 worked fine with no modifications required (with 1Ω resistor as originally designed for 14mA actually drawing 10mA -- no much difference -- the dimmer might be and better as it won´t "jump into your eye")

... the creep itself ... in action XD ...
. . . the crystal balls´re not from the original set . . .

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i actually researched the cc design-line further for Op Amps as i attempted to control 555 charging cycle as shown below . . .
. . . and the best results (for misc. cc - sink) gave the next weird setup (no good for PWM or pulsed setup)

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C-MOS - op. amp. capacitor charge control - a concept design . . .
! update 2017.01.04 17:08 UTC+2h ↑↑
(with no big difference)

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unusual use of 555 timer in phase shift osc. setup . . . the modulation input - has no desired effect here - coz lowering the upper trigger level dis-balances the charging currents that'd need to be cc sourced - but for 500kHz i didn't wanted to extend the test for here . . .

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update 2016-12-21 14:38 UTC+2h (-2h UTC) ::

opti´ng the timer out of the circuit ???

 ? there seems to be no lower limit but the capacitors´ manufactured and what you can afford

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555 component level model test

555 as RS trigger

555´s behavioural model Ring Counter ?? 5MHz

555´s component level model Ring Counter

Self-loop-back Oscillator . . .

. . . finding the limits

Re-trigger from timing capacitor

Re-trigger from merged threshold inputs

Re-trigger from low going output

Simple PWM -- there´s a Clock triggered CC v. of it in a prev. post -- but the CC clock triggering showed out multiple problems with this component level model (which are more easy to overcome using hardware other than 555 timer) . . .

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PWM Test

Pulse width modulator based on LM311

Resistor adjusted

Automated - Sine-wave drived

Functional description ::

• LM311 :: U1 - voltage to PWM modulator , U2 & U3 - LED drivers
• LM324 :: U9 - Supply median , U4 - OpAmp´s virtual ground (internal to self) , U5 & U6 - Quadrature oscillator , U7 & U8 - Level shifter (for crap Cos outp by LM324 "OpAmp?") , U10 - LM324/Cos(αt) to R2R extender (for a Spice experiment)

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Pulse width modulator based on NE555 - from datasheet

. . . revised (Update!)

. . . as i realized the most likely principle of operation of this modulator on datasheet for this crap to work right requires the modulating voltage to be pre-adjusted to inverse function of :
f(m) = m^(1 + Pi × m) . . . ? lets see . . .
exp(f()) = exp((1 + Pi × m) × ln(m) )
f() = (1 + Pi × m) × ln(m)
m = f.inverse(f().valueOf())
. . .
-- i guess my 311 PWM (in the 1-st & 2-nd circuit-fig. in this post) is a better choice
. . .
checked the backgrounds of the prev 555 PWM v. "failure" -- added constant current charging , adjusted capacitor/modulation vtg. threshold levels . . . seems working

to adjust the circuit to operation the lowermost modulation vtg. level must be set so that the break per clock still occurs ... and the capacitor value so that at the uppermost mod.vtg. level the break occurs before each next clock (requires 2-ch scope or a digital error detector -- perhaps such where clock increases the counter and OUTP resets it -- so whenever the count reaches 2 the capacitor value is too big)

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Old Op Amp test PPM dcVC check

5V operation of LM358

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pulse position modulated direct current switching voltage converter QC

! likely source® http://www.24vpower.com/dianlutu/89.html

converting it to 20V to 5V variant

. . . adjusting switch turnoff time ... down to about ~ 100ns

no further checks (e.g. output short circuit , load steps , starting at mild overload ... )

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