Showing posts with label LTC6240. Show all posts
Showing posts with label LTC6240. Show all posts

Saturday, December 16, 2017

Random Op-Amp TEST - 2

Heuristic Test /// note that no matter these results may seem poor , they are poor in conjunction to the (perhaps a poor) test setup and relative to each other - - - i never test poor amplifiers (e.g. something that i know will fail my application) or do not test such without especially denoting it . . . as in fact the TLV314 was the best performer of a previous tests of it's kind (Low-power , Low-Voltage CMOS Op Amps) - - - here we have a high slew rate and/or high slew rate to bandwidth ratio Op Amps tested (where the TLV314 is just for comparison)


Fuzzily about how it works



[Eop]

Monday, December 4, 2017

yet another DAC

it seems the Spice Models do "Count" -- although this may seem a far shot -- then there is actually a real life analogy or at least a strong potential -- that the certain components or a combination of produces far better results than some others !!



perhaps continued ...


optimistic with "continuous"/slow slope signal



[Eop]

Thursday, November 30, 2017

4-bit DAC and ADC test

src :: http://www.brown.edu/Departments/Engineering/Courses/En123/Lectures/DAconv.htm

modified


?? -- sounds "fun"

best guess :: The Pipelined ADC-s

src::not found at web

apx. guess of the ADC circuit layout and biasing resistors


related ::http://chpsndtch.blogspot.com.ee/2017/08/4-bit-adc-improvement.html

base/radix 3 ver. :: uses the same amount of ic-s per cascade -- but has "exponentially" higher resolution


↑ the radix 3 output can be converted to binary by summers -- for example ↑
something similar found at www :: https://www.researchgate.net/publication/220365717_A_Low-Power_Capacitive_Charge_Pump_Based_Pipelined_ADC

at the sown  ADC-s when switched to 5V single supply and the CMOS comparators and op amp-s -- the least can be extended with 74HC125 or ↓ 74HC126 ↓ (to gain the OC OE functionality of LM311) . . . in other words by these changes the circuit can be made faster

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CMOS Radix-3 :: 2.5x faster than a "slow" LM324

↑ there's some optimistic 2.5µs read window ↑ to stay at the precision of the shown 0 to 26 e.g. 27 level of quantization . . .


As a target of these tests -- i attempted to find suitable ADC - DAC combination to set up a successive approximation ADC
  • as by adding cascades to shown cascaded(/pipelined) ADC-s -- the transition delay to LSB-s increases -- they don't much improve the final conversion speed
  • basically the cascaded converters are a "Static SAR DAC" variants -- the SA delay still remains
  • i must rethink the concept here
    • -- either should use a parallel converter
    • or try to incorporate/integrate a differential approach

[Eop]

Sunday, February 5, 2017