SMPS -- (bad) design attempts

1. -- Testing out a random circuit from www

2. -- Testing loosely pre-calculated design (not fully conceptually correct)

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[Eop]

YX8018 ~about "guessing the operation"

→NB←! the following has pretty much nothing to do with the actual chip !!! ←
i just matched some known or guessed data into random simulation substitute

from what we can conclude ::

1. the device operates best at certain fixed supply voltage (there might be one built in to YX8018)
2. the best efficiency is occurring below the certain output power = you should not replace the inductor to lesser inductance one without making sure :
   a) that there's enough power to drive the inductor (somewhat aided by the 1µF and 5µH caps inductors at the schematic) ,
   b) that the inductor won't be driven into saturation
   ( ↑↑ ← both are primarily indicated by a notable drop in efficiency compared to initial -- however the lesser inductance does, by the idea, give a* higher output power and usually there is some efficiency drop for "trade" to such* )
3. the onboard inductor in my particular solar lantern has 4Ω series resistance (it might be useful to protect the mosfet from peak power ? from accidental out of cycle re-trigger . . . or provide some voltage regulation for more up to charge battery) , otherwise there's a plenty of room to install a better inductor (such might also cause the over-voltage at the switch drain -- it must be tested out at max input power)

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[Eop]

Switched capacitor voltage tripler revisited

it seems te heart of the thing is a decent driving signal
extends http://chpsndtch.blogspot.com.ee/2014/10/switched-inductorless-dcdc-converter.html

all transistors and diodes are respectively

2N2222 2N2907 1N4148 1N5817

there's not much time wasted to optimize this circuit - just ran the concept test

the output should likely be additionally regulated and the converter set to run at demand (the output drops below certain threshold) by an electronic control (all of which were not included in this setup)

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[EoP]

1x versus 2x (AA) powerable SCS switch simulation experiment

the goal was to study a possibility using the SCS bi-stable switch for a memory element (trigger)

it seems the 3.8V is here a critical lower limit below what the implementation of anything gets very difficult -- determining the operating range & conditions
a somewhat complete test : timer : driving pulse former : electrical switces : 1bit RAM : readout buffer -- 1x AA schematic
(an old thing revisited) here the critical voltage is around 1.8V - to drive next switch without pulse amplifier -- 2x AA schematic

and thats it for now -- btw. incase you want to build any of such you need to separately tune/verify. each trigger-stage -- 1-st as an input 1 then as an output one /!\ besides , the set of any number of , may form a closed system (so that adding a stage may require retuning the entire N+1 stages) + trivia -- you also need to verify error free operation under varying supply and specified frequency×duty combinations (and even then you still may expect occasional transition failures for 2x AA v.) -- so if you need a complex app. use commercial "pre-tested" logical circuitry (each variant of witch requires a specific measures to gain an error free operation also ...)