Showing posts with label LM308. Show all posts
Showing posts with label LM308. Show all posts

Tuesday, September 28, 2021

Op Amp dif. CM inp. imp.

 The differential and common mode input impedance of the op amp transistor models ...

 










[Eop]

Saturday, August 7, 2021

Pos. fbk. Op. Amp. - (spice) noise


about LM324 , uA741 , TL071 , LM308 :









  compared to conventional biasing schemes : 


the pos.-fbk scheme has more poor noise and frequency characteristics but it enables to use the feedback shoulder to excite a crystal or reduce the input current . . .


 [Eop]

Saturday, April 6, 2019

BjT versus OpAmp Staircase Generator

src::GE Transistor Manual 7-th ed. 1964 p.345
about :: it takes higher energy pulses + a NEG supply to run , (it may be not so as i quite don't get yet the anatomy of the thing but) it seems to have a worse linearity than the OpAmp v. though it also seems to keep it's levels longer in place and have a smaller variation in step size near zero to near Vcc (to "Zero the drift" it takes somewhat unreal precision tuning of the bias resistors . . . )




PS! -- The RESET circuitry is NOT implemented for neither one of the gen.-s -- coz it'd result in slower simulation times - and it should be relatively easy to set up one for your needs
. . . also the use of low power oscillator requires a buffer 1 to not be affected from the fast-/"a low resistance value" -biasing resistors' reaction/(?bwd coupling)

src::http://zpostbox.ru/g4_e.htm (Fig.28)
about :: the OpAmp v. accepts a higher variety of pulse voltages and tank-/integrator capacitor values -- the linearity is likely better than for bjt v. also the integration range is bigger (due lesser possible pulse amplitude values and the possibility to drive OUTP (Vsc) more close to upper rail . . .)





[Eop]

Sunday, March 17, 2019

LM324 versus LM308 -- MM versus CLM

LM324 versus LM308 -- Macro Model versus Component Level Model

In small signal range the LM308 (an older design 1969) seems to have a half faster response than the LM324 (a newer design ?1972?)


signal shape dependency on input amplitude ::


the particular apx.-n of LM324 CLM is not too exact (but in some tests shows out a better performance than it's factory provided macro- (a "net list" .cir) model)





[Eop]

Thursday, March 14, 2019

Progressive current limiting

Figures ::






Legend :: opamp.Q1 mirrors the current at R5 , opamp.Q2 limits the current progressively ... and incase of the SC it cuts the output the more off the lower is the output voltage -- so there's double level progressive limiting (the fig.2 shows the 1-st and the fig.-s 3 to 5 show the 2-nd - a short circuit - limiting levels) . . . the resistor values for R24 to R26 and R21 , R22 , also for the R14 may need to be adjusted to get the real build of the circuit stable (maybe it takes more adjustments -- but these are known to be more likely critical at this stage of dev.)

[Eop]

Saturday, March 9, 2019

Revised LM308 CLM

comparative test of net-list (macro) against sub-circuit (CLM(component level models))


versus near idealized transitors' CLM (shown@) ↑↓ (see trace Y1)


experimental non-inverting biasing/balancing


DAC from d/s example




[Eop]

Friday, January 11, 2019

2019.01.05 follow up . . .

. . .

6.1 ) -- basic , simple -- Op-Amp v. NPN input stage (using macro-/"net-list" -model)


6.2 ) -- basic , simple -- Op-Amp v. NPN input stage (using component level model)


6.3 ) -- basic , simple -- Op-Amp v. NPN input stage (using component level model)

( ↓the mod↓ incase the ↑prev. v.↑ don't want to start up "simultaneously" )




[Eop]

Sunday, August 19, 2018

Re Electret Amplifier

the lm324 turned out to be too unstable thing for this operation ???
so::

replaced it with LM308



the ↓↓ Ti-s Bullshit Spice Model ↓↓ generated problems at frequency pass - so i had to dump it out




[Eop]

Monday, May 21, 2018

ADC related Op.-Amp. Experiment

~about


↑↑ _ the best result here however would be Frequency × Slew Rate _ ↑↑

(( required to Drive 74HC14 's INP , AND/OR that relative to a VREF . . . basically to make power-buffer's input more sensitive & a higher impedance one))


[Eop]

Thursday, September 14, 2017

Wednesday, September 13, 2017

LM113 quest for practical use

what it seems by now is that utilizing the potential power of the chip requires the target oriented , also a clever and sophisticated "trick" -- not a straight forward block level design but the one that takes into account the specific nature of the LM113 in this case . . . i yet am to figure out both - the trick and the nature . . .

experiments ::

used as shunting regulator

d/s version
PS! altering the ellipsed values causes the circuit to become unstable/oscillate

combined trivia
 
used as zener

shared function in feedback chain

not used at all / instead we use positive error feedback here ▼

fast opening non-linear/log. bridge/circuit elements

 
used as zener -- OR -- if we consider the j-Fet´s V.gate = fn.(I.source) then seeing it upside-down it acts as shunting ref. functionally shunted to Op Amp OUTP or V.gate

j-Fet bridge



[Eop]

Sunday, February 5, 2017

Thursday, February 2, 2017

LM308 macro model substitute

my component level models perform basically the same while .cir model doesnot quite get "there" (what's expected)



googling for substitutes didn't revealed any credible results so - going to error~trial ...


the following figure sows a TOP - dn list of most possible substitutes for the LM308


although the LTC1047 looks a better match by gain curve - then after reading the datasheets of the bad boy (LM308) itself and it's other 3 top substitute candidates the LT1366 seems to be preferred coz LTC1047 needs extra feedback capacitors and LT1880 is referred to as super ß Op Amp (the input sensitivity of such may be a likely source to some instability . . . maybe . . . . . . . . . the LM308 is supposedly not so calm as it's macro-model lets it show ???) - so the LM1366 may be too calm coz it's internal capacitors maybe not - anyway it performs near excellent at the following quick check !


semi theoretical - mathematical application test ...
-- just a quick pileup from scratch -- to get some idea of it's behavior / performance (if it's a right chip for the task and/or substituting . . .)



[Eop]