Latest experiments ...

a low voltage DS(hcottky)TL test ::

in :: https://www.falstad.com/circuit/circuitjs.html

in :: https://www.analog.com/en/design-center/design-tools-and-calculators/ltspice-simulator.html

---

j-Fet test ::

---

scs test (a variety modified from the 7-th ed. GE Transistor Manual 1964) ::

---

about :: the following is carried out on intent to find out the low-power-edge function of the scs / pulse-driven logic - - coz there're a lot of old discretes lying around nothing to do with - - in most cases the DTL is out performing such in a sense of power efficiency (but there are few exceptions and some conditional exceptions . . . most yet to be defined . . .)

---

(-a-) -- incomplete design of low power HOLD capable RAM/Counter . . .

(-b-) -- i guess the proper operational voltage levels' range selection allows the following to operate without pulse amp stages . . .

(-c-) -- ↓it↓ draws about 10mA per cascade/stage for about 400kHz CLK src. (& takes an additional circuitry to read the trigger OUTP levels . . . e.g. adding even more power use in real implementation . . . )

---

[Eop]

1x versus 2x (AA) powerable SCS switch simulation experiment

the goal was to study a possibility using the SCS bi-stable switch for a memory element (trigger)

it seems the 3.8V is here a critical lower limit below what the implementation of anything gets very difficult -- determining the operating range & conditions
a somewhat complete test : timer : driving pulse former : electrical switces : 1bit RAM : readout buffer -- 1x AA schematic
(an old thing revisited) here the critical voltage is around 1.8V - to drive next switch without pulse amplifier -- 2x AA schematic

and thats it for now -- btw. incase you want to build any of such you need to separately tune/verify. each trigger-stage -- 1-st as an input 1 then as an output one /!\ besides , the set of any number of , may form a closed system (so that adding a stage may require retuning the entire N+1 stages) + trivia -- you also need to verify error free operation under varying supply and specified frequency×duty combinations (and even then you still may expect occasional transition failures for 2x AA v.) -- so if you need a complex app. use commercial "pre-tested" logical circuitry (each variant of witch requires a specific measures to gain an error free operation also ...)