the CLK not verified as opt. for this v. but for it's predecessor that was tracking the analog input with the analog summer - the D-Flop output was basically the same only it was without the U/D counter ...
the following shows the effect of resetting the U/D count to 0 after specific time interval (number of clocks)
-- the effect with pure*sine wave here is the "reset" (actually a periodic substraction of some constant) integrates the derivative of it* back to it* -- it's a lot of tedious testing to determine what to actually implement in circuit . . . but the following is showing the prev. test being on the right track
what is surprising here is that the lesser number of clocks gives better results ???
[Eop]
