a low voltage DS(hcottky)TL test ::
in :: https://www.falstad.com/circuit/circuitjs.html
in :: https://www.analog.com/en/design-center/design-tools-and-calculators/ltspice-simulator.html
j-Fet test ::
scs test (a variety modified from the 7-th ed. GE Transistor Manual 1964) ::
about :: the following is carried out on intent to find out the low-power-edge function of the scs / pulse-driven logic - - coz there're a lot of old discretes lying around nothing to do with - - in most cases the DTL is out performing such in a sense of power efficiency (but there are few exceptions and some conditional exceptions . . . most yet to be defined . . .)
(-a-) -- incomplete design of low power HOLD capable RAM/Counter . . .
(-b-) -- i guess the proper operational voltage levels' range selection allows the following to operate without pulse amp stages . . .
(-c-) -- ↓it↓ draws about 10mA per cascade/stage for about 400kHz CLK src. (& takes an additional circuitry to read the trigger OUTP levels . . . e.g. adding even more power use in real implementation . . . )
[Eop]
in :: https://www.falstad.com/circuit/circuitjs.html
in :: https://www.analog.com/en/design-center/design-tools-and-calculators/ltspice-simulator.html
j-Fet test ::
scs test (a variety modified from the 7-th ed. GE Transistor Manual 1964) ::
about :: the following is carried out on intent to find out the low-power-edge function of the scs / pulse-driven logic - - coz there're a lot of old discretes lying around nothing to do with - - in most cases the DTL is out performing such in a sense of power efficiency (but there are few exceptions and some conditional exceptions . . . most yet to be defined . . .)
(-a-) -- incomplete design of low power HOLD capable RAM/Counter . . .
(-b-) -- i guess the proper operational voltage levels' range selection allows the following to operate without pulse amp stages . . .
(-c-) -- ↓it↓ draws about 10mA per cascade/stage for about 400kHz CLK src. (& takes an additional circuitry to read the trigger OUTP levels . . . e.g. adding even more power use in real implementation . . . )
[Eop]
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