LMxx39 Circus + 750ns & - 900ns Zero Cross

Circus

Ti provided Pspice thingy for LM339 (is annoyingly ▲impractical▲) + (some of the chip names might be erroneous) -- anyway a good question here is why that cfg. doesn't generate "timestep too small" error . . .

Ti LM339 behavioural model as the bottom plot -- interestingly -- the closest match to prev. does not appear to be the right transistor circuit - the LM239 - but instead my experimental design as LMx39 (respectively LM293 and LMx93 in simulation circuit - both are the component level models e.g. the sub circuits) . . .


Cross the Zero +700ns

making the src. (whitch is yet another variant of the Lim.- or the Window comparator) more practical

Cross the Zero -900ns

using the "slope detector" - the right - first occurring comp.-pair signal can be passed to outp (removes the "echo")

[Eop]

4-bit ADC improvement

reworked the indirect src.

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[Eop]

K174YH4A audio power-amp. TEST

i just needed to confirm the apx. setup , study a bit about it's pin functions . . .

transient

► the R7 was shown on a schematic as 30kΩ - it very slightly suggested from the output wave form that it might be of a lesser value -- also the value for C5 is mostly intuitive -- since i mostly do DC amplifiers -- i can't confirm nor reject any of these -- e.g -- don't use/distribute this schematic without critical revision / notice about it's TEST status.

+ . . . ?? it seems it's output passes back to it's input so i 1-st reduced the inp.imp. from 10kΩ down to 1kΩ then further to 75 (though it was almost acceptable with 1k ???) . . . yet another d/s about this chip shows the inp.imp. to be GE to 10Ω it's ten ohms - no kilos . . . ??? what kind of an amplifier has 10Ω input impedance . . . as i told i donno much about -- !audio? . . . sh¡t - it is still that kilo ohms e.g. it is 10k (they used insane notation as unit - kΩ , value - scientific , as 10¹ , so i didn't expect the non-SI unit -- while it turned out the exponent ¹ was a pointer to reference text . . . !!! documents !!! documenters ...)

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frequency

??

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re-transient this time with just above 1W ??? 300mW or less for the real chip ("std. derating" factor)

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[Eop]

CMOS osc.-s TEST

! notice the word "test" above !!!

in images

originally with j-FET (← to cancel out BJT feedback to quartz) and BJT (← the low power side) while i realized the j-FET can pretty much do the thing on it's own . . .

the copy paste from NXP-s datasheet (the R3 + diodes added as a speculative ¹ startup booster / ² frequency booster / ³ exponential atenuator)

"alternate compile" of the above prev. (not thoroughly studied !!!)

what the NXP d/s does not tell you . . . about 32kHz quartz (the "C5" is the type of magic wand here)
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Misc. "non-std." RS-triggers

derived from the idea of the pulse RS trigger (← the referred post has been updated (the "pRS trigger as ↓below↓ contains a bug !") )

ALL

BOXES (positioned as above)

 (blah, blah ....) . . . the upper plot on the graph (N,L) , lower right (X4) is the "first attempt" to "Pass Gate" model the function of the TTL v.´s substitute the upper right (X2) however it's actual function is - set the signal by first set input and update as soon as next clear input occurs (e.g. only one of the inputs being high) extra to that the first risen input locks the other one off so it has no effect as long the firsty stays high

. . . the lower plot on the graph (X,W) , upper right (X2) is what was the aim (similar to linked TTL´s substitute at the beginning of the post) -- the function - set the OUTP by the first risen INP , ignore all input until both inputs are pulled down

. . . the 2-nd lower plot is for "Pass Gate" v. of (X2) - the (K,M) graph , upper left (X1) - took a bit tricky "gate" drive logic to get it going the way it should -- the function - same as X2 only with a bit faster responce . . .

. . . the 2-nd upper plot (S,T) , lower left (X3) is as X2 and X1 only the OUTP is set when input is (Zero,Zero) and the output is set by the first risen from (Zero,Zero) - so the trigger here remembers where it should be going and goes there when INP is "clear" . . . (simple as soapy water)

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the initial purpose of the kind of RS mod. was counters study as below (the N,L - X4 - v. won't work with the below v. of D-Latch coz it would continuously see it's inverted output and starts strobing while D-Latch passes data . . .)

+ an extreme v. of the above T-flops with an experimental Pass Gate

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[Eop]