Testing Pseudo Capacitors

it turns out you can cook a lot of capacities out of bipolar triode

a descending list :: (also on the 1-st fig. below)

• connect E2E2C2C using bases as outputs or (equals) tie E&C together and merge B-s
• connect E2E & C2C using bases as outputs
• connect E2C & C2E using bases as outputs
• tie CB-s together and use as outputs merge by E-s
• tie EB-s together and use as outputs merge by C-s

(PS! -- the shown voltage tuning takes up to about a second to settle !!!)

+ a simple osc. test ::

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LM393 CLM TEST

LM393 speed test with a dynamic output voltage divider -- gives a best high speed sense range for the 5V supply

the divider (conditionally --and/or-- very approximately ) corresponds to about a single 3.6kΩ pullup resistor (or speculatively to about 1mA max. sink current at high frequency = (5 - 1.4)·1V/3.6kΩ)

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An experimental javaScript Output Voltage Divider Calculator

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Voltage Divider - Calculator

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The Browser Detected ...
window.top.navigator.appName :
window.top.navigator.appCodeName :
window.top.navigator.platform :
window.top.navigator.product :
window.top.navigator.appVersion :
window.top.navigator.userAgent :
window.top.navigator.userAgent (about guessing the Browser) :
V_CC :
U_HI :
U_LO :
I_SNK :
Integrity of the entered data :
R₁ :
R₂ :
R₃ :
R₀ : -- R0 = R1||R3

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Usage :: R1 to R3 correspond to {r1} to {r3} on the Fig. above

 

See also : the formulas for the Voltage comparator's resistive output delimitter

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Summing it up ::

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Log./Antilog. TEST

pay attention to the formulas in plot pane

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LM324 versus LM308 -- MM versus CLM

LM324 versus LM308 -- Macro Model versus Component Level Model

In small signal range the LM308 (an older design 1969) seems to have a half faster response than the LM324 (a newer design ?1972?)

signal shape dependency on input amplitude ::

the particular apx.-n of LM324 CLM is not too exact (but in some tests shows out a better performance than it's factory provided macro- (a "net list" .cir) model)

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Progressive current limiting

Figures ::

Legend :: opamp.Q1 mirrors the current at R5 , opamp.Q2 limits the current progressively ... and incase of the SC it cuts the output the more off the lower is the output voltage -- so there's double level progressive limiting (the fig.2 shows the 1-st and the fig.-s 3 to 5 show the 2-nd - a short circuit - limiting levels) . . . the resistor values for R24 to R26 and R21 , R22 , also for the R14 may need to be adjusted to get the real build of the circuit stable (maybe it takes more adjustments -- but these are known to be more likely critical at this stage of dev.)

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Revised LM308 CLM

comparative test of net-list (macro) against sub-circuit (CLM(component level models))

versus near idealized transitors' CLM (shown@) ↑↓ (see trace Y1)

experimental non-inverting biasing/balancing

DAC from d/s example

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