More experimental spice models

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Digital (SN7400 , SN7404 , SN7414 , SN7474 , SN7486 , SN74112)

how and when i use ↑these↑ :: is to determine the apx. dynamic power draw , relative I/O states , etc.

it is not advised to use these in complex digital simulations coz such takes excessive time ... and serves no conceptual purpose

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TLC555 (Ti's P-Spice , + a Less simplified , + a More simplified)

since my first Ti's TLC variant model conversion for the LTSpice got destroyed  in OS reinstall - i haven't had time to recreate it . . . so -- the simplified /!\ ideal /!\ models are "close enough" to run a principial simulations -- one must address the shortcomings of such . . . + moreover the ideal models lack some required damping and referencing internal components ← means: the simulation may hang due the shortcomings from such = all pins must be connected or referenced through R or R C networks ← the values of which may be crucial to simulation "stability" (not to hang , etc. ...)

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"DIGITAL" PASS GATE (not fully verified but so far a will do v. -- with 2 simulation examples)
(related post : Comparing TTL JK Triggers' Logic Designs)

example use

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[Eop]

Some experimental (mostly CLM) models

► Analog ◄ about ::

the models are (behave) sometimes (at some circuits) better than the manufacturer provided ones . . . anyway they are the way slower -- so , using the multiples of them dramatically slows down the simulation . . . /!\  since the op amps basically act all the same  /!\ it is advised to use similar Is , Vs , GBW , SR or better LTSpice's "built in" substitutes in case the simulation speed matters

________________________________________________________________ misc. files _remove_temporary_files.bat Deletes unused simulation data files ~about_these_files.txt ↑← This File →↓ ________________________________________________________________ .cir models AD633.asy ad633.cir Analog AD633 P-Spice Model of the analog 4-quadrant multiplier AD633AN.asy AD633AN.cir Simplified AD633 macro model AZ431.asy AZ431.cir TL431 functional analog of the Programmable Shunting Voltage Reference/-Regulator LM311.asy LM311.cir Voltage Comparator LM324.asy LM324.cir Op-Amp LM393.asy LM393.cir Voltage Comparator LT1011.asy ! built-in LTSpice built in model (at the default Path) of the Voltage Comparator (LM311) NE555.asy ! built-in LTSpice built in model (at the default Path) of the NE555 ________________________________________________________________ .asc subcircuit models AN6914.asc AN6914.asy LM393 component level functional anaolog of the OC OUTP voltage comparator K554CA3-A.asc K554CA3-A.asy LM311 component level functional anaolog of the OC-/OE OUTP voltage comparator KA7805.asc KA7805.asy CLM (component level "model" / functional anaolog) of the 3-terminal linear voltage regulator LM2903.asc LM2903.asy LM393 component level EXPERIMENTAL anaolog of the OC OUTP voltage comparator LM317T.asc LM317T.asy CLM of the 3-terminal linear voltage regulator LM324XI.asc LM324XI.asy CLM of the Op-Amp NE555ic.asc NE555ic.asy CLM KP1006BU1.asc KP1006BU1.asy CLM of the NE555 Kp140yg1208cx.asc Kp140yg1208cx.asy µA776 CLM Op-Amp (recommended at 15µA control current) KP140yg1408vA.asc KP140yg1408vA.asy LM308 CLM Op-Amp ________________________________________________________________ .asc circuit DEMO simulations NE555-TEST-Es1117-Plus.asc NE555-TEST-Es1117-Plus.plt NE555 - parameters TEST NE555-TEST-Es1117-Plus-A.asc NE555-TEST-Es1117-Plus-A.plt NE555 - parameters TEST 2 NE555-TEST-Es1117-Plus-B.asc NE555-TEST-Es1117-Plus-B.plt NE555 - parameters TEST 3 GCx93 - CLM - Test - Q104-mp.asc GCx93 - CLM - Test - Q104-mp.plt LM393 - test K554CA3 - CLM - Test - Q110-mp.asc K554CA3 - CLM - Test - Q110-mp.plt LM311 - OE test K554CA3 - CLM - Test - Q112-mp.asc K554CA3 - CLM - Test - Q112-mp.plt LM311 - OC test Random - Op-Amp - TEST - iZ-8aF-xF.asc Random - Op-Amp - TEST - iZ-8aF-xF.plt LM324(XI) CLM test ________________ ** [EOF]

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[Eop]

Re-Re: Low power pulse timer

as it was modified :

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[EoP]