Wednesday, June 6, 2018



Digital :: the circuit is voluntarily interpreted and is illustrative -- further testing must be carried out to implement a working instance of such circuit . . .

a more realistic ver.


Monday, May 21, 2018

ADC related Op.-Amp. Experiment


↑↑ _ the best result here however would be Frequency × Slew Rate _ ↑↑

(( required to Drive 74HC14 's INP , AND/OR that relative to a VREF . . . basically to make power-buffer's input more sensitive & a higher impedance one))


Tuesday, May 15, 2018

8-bit ADC experiment

Update about component pick


Sunday, May 6, 2018

9 to 5V test (a bad but interesting example)

the control does not work quite as i planned but i got it to work a bit differently (but as so there's no credit it won't fail at certain condition)

(the predecessor) constant load/drive test

the pwm must be set to predict to mach it's effect on input – output voltage + output current draw and the change to the all of previous - - is possible but may complicate the control and add significant power draw . . . it'd also slow down the simulation .. .. .. but i will likely at some point run such . . .

right now buying any available switching controller is a better option


1.5 to 5 V dc/dc experimental design

the design and the component values are not being optimized -- but rather tuned for sufficient regulation and efficiency


Wednesday, May 2, 2018

555-s based SMPS test

as is ...

... in practice it requires a sharper or more discrete response for larger errors -- this one could do for relatively steady load -- a bad point here is that increasing the controls' sophistication impacts either on efficiency at light loads - - - or retail tech. such as in SMPS controllers where the dev. of such is expensive and won't pay off for prototype solutions . . .

+ an update to the schematic in the prev. post

no pwm just switching test


Tuesday, May 1, 2018

SMPS experimental test

MC33063 -- 9V to 5V

Custom -- 9V to 5V with the uni-polar or basically the ON-OFF control

. . . the uni-polar to bi-polar PWM control signal formation block (essential tests)

!! update !!

Random feedback circuitry . . . is "doable" test ::

The bi-polar control circuit -- occasionally skips to 800kHz mode::

With modified MOS-Fet drive stage -- without feedback stays at 166kHz