the goal was to study a possibility using the SCS bi-stable switch for a memory element (trigger)
| it seems the 3.8V is here a critical lower limit below what the implementation of anything gets very difficult -- determining the operating range & conditions | 
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| a somewhat complete test : timer : driving pulse former : electrical switces : 1bit RAM : readout buffer -- 1x AA schematic
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| (an old thing revisited) here the critical voltage is around 1.8V - to drive next switch without pulse amplifier -- 2x AA schematic
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and thats it for now -- btw. incase you want to build any of such you need to separately tune/verify. each trigger-stage -- 1-st as an input 1 then as an output one /!\ besides , the set of any number of , may form a closed system (so that adding a stage may require retuning the entire N+1 stages) + trivia -- you also need to verify error free operation under varying supply and specified frequency×duty combinations (and even then you still may expect occasional transition failures for 2x AA v.) -- so if you need a complex app. use commercial "pre-tested" logical circuitry (each variant of witch requires a specific measures to gain an error free operation also ...)
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