Sunday, December 27, 2015

a flip-flop experiment

a ? "T-trigger" from two NAND gates ::

►► the idea behind it was to use a half of 7400 for one "pulse driven RS-JK-trigger" . . . which might be the case if this thing can be opt-/minmized to a lesser component count (total design/build-cost) and made a lot more noise immune (can be operated in realistic env.) - it will start to oscillate if it´s shoulders components won´t match too well (which means almost precisely) -- here i just found the reasonable upper frequency limit for (about 44MHz for inp.-clk.)

the Q0 , Q1 are inter-coupled to get high-fq. readout - with lesser frequency there´s no need to couple them - and originally they were added to confirm the valid readout can be had from K and/or M gates -- so , the fast ver. of this trigger requires the full 7400

. . . just had that question


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