Monday, May 12, 2014

DTL logic visualised

just wanted to see D-trigger in operation - is a 6 stage module - only made 2 so far - enough for the RS trigger

<iframe allowfullscreen="" frameborder="0" height="480" src="//www.youtube.com/embed/Nwg2JhP_rYc" width="640">
<!-- (embbed you arse) - another bulls'that causes blogger to hang F! . . . //-->


"WYSIWYG" . . . apx. -- the schematic

 PLOT
 TIMED to apx. match the video
B4 proceeding the 3-rd stage must assembled - each instance must be parametrized for continuity of discreet signal flow - if such is continuous and we get some oscillator running then it's enough to give it a GO - t.m. - the PCB must designed , made , perhaps some sh¡t more - then we run the visualization test - and the resource becomes a spare parts again - t.m. - design a PCB so the components are least affected - really annoying stuff that can be done if you have nothing else to do or need to test some new feature ...
[EOF]

No comments: