Friday, March 4, 2016

E - efficient pulse generator revised


about 8ns transition (it can be reduced to 1ns - loosing it's energy efficiency) -- the osc./gen. only - the basic concept ::

59.6ns pulse @ 45kHz ::

►a theoretical concept how to narrow the CMOS gate pulse (here to 32ns width ~ Zero credit for real implementation to responce so) ::

update 2016.06.05 with faster inverter model ::


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