the src. A (fig. ⓐ) - won't start up with higher ß , silica "western" transistors
if we add a "startup**" it won't be overload proof -- it is possible to set there a time constant based startup "boost" that charges the output capacitor to near nominal output at no or moderate load connected . . . why all this fuzz - i just studied the circuit for it's simplicity . . .
. . . the next is what i came out as a near reasonable practical solution for the type of regulator (or what's left of that type)
update: an alternate "startup**" v. that is still overload proof only it requires extra "Discharge" button to get off the "output disabled mode" -- to make it also "user proof" requires a special discharge or power button so that the discharge engages only when external supply can't charge the caps. -- all cool the simlpe things are not simple . . .
the src. B (the leftmost fig.) -- works good as shown as long the input voltage is higher the output plus NPN-s BE vtg. drop + Op Amp-s incapability to reach positive rail some 1 to 2 V
if we power the regulator control circuitry from separate supplies - we get the foldback v. of the above src.