Tuesday, August 8, 2017

CMOS osc.-s TEST

! notice the word "test" above !!!

in images
originally with j-FET (← to cancel out BJT feedback to quartz) and BJT (← the low power side) while i realized the j-FET can pretty much do the thing on it's own . . .

the copy paste from NXP-s datasheet (the R3 + diodes added as a speculative 1 startup booster / 2 frequency booster / 3 exponential atenuator)

"alternate compile" of the above prev. (not thoroughly studied !!!)

what the NXP d/s does not tell you . . . about 32kHz quartz (the "C5" is the type of magic wand here)

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